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Digital Computers Electronics, Organization & Fundamentals

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Best Book for Computers Electronics, Organization & Fundamentals. Specially Designed for B.Sc., BCA, MCA, MCM, B.E., Polytechnic & other Professional Courses.
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SYLLABUS   Chapter 0 : Introduction to CS and Special Peripherals   0.0   Computer Science  a-1   0.1   Computer for Individual Users (Personal Computer)  a-1   0.2   Desktop Computers  a-2   0.3   Notebook Computers {Laptop Computers}  a-2   0.4   Workstations  a-4   0.5   Tablet PC  a-4   0.6   Handheld PC  a-5   0.7   Smartphone  a-6   0.8   Computers For Organization  a-6   0.9   Network Servers  a-7   0.10   Mainframe Computers  a-7   0.11   Minicomputers  a-8   0.12   Supercomputer  a-8   0.13   PowerPC  a-9   0.14   Touch Screen  a-10   0.15   RAM Disk  a-11   0.16   Webcam  a-12   0.17   Monitor  a-13   0.18   CRT Monitor (Cathode Ray Tube)  a-14   0.19   LCD (Liquid Crystal Display) Monitor  a-15 Chapter 1 : Representation of Information  External Data Representation  1  Internal Data Representation  2   1.1  Numeric and Non-numeric Data  2   1.2  Integer and Real Numbers  2   1.3  Number System  3  Base (Radix)  3  Binary Number System  4  Octal Number System  5  Hexadecimal Number System  7  Use of Hexadecimal number  8   1.4  Positive and Negative Numbers  8   1.5  Conversion from Decimal to Any base  9  Decimal to Binary Conversion  10  Decimal to Octal Conversion  12  Decimal to Hexadecimal Conversion  14  Integer Part, Fractional Part  15   1.6  Conversion from Any base to Decimal  16  Binary to Decimal Conversion  17  Octal to Decimal Conversion  18  Hexadecimal to Decimal Conversion  19   1.7  Binary to Octal and Hexadecimal conversion and Vice-Versa  21  Binary to Octal Conversion  22  Octal to Binary Conversion  24  Binary to Hexadecimal Conversion  24  Hexadecimal to Binary Conversion  25  Octal to Hexadecimal Conversion  26   1.8  Floating Point Representation  30  Normalised Floating Point Representation  30  16 bit Normalised Floating Point Representation  32  32-bit Normalised Floating Point Representation  35   1.9  Representation of Binary Integers   37  Unsigned Binary integer  37  Signed Binary Integers  37   1.10  Overflow and Underflow  42  l Questions  43 Chapter 2 : Arithmetic in Number System   2.1  Binary Addition  45   2.2  Binary Subtraction  47   2.3  Binary Multiplication (Unsigned Integers)  49  Shift and Add Method (Long-Hand Method)  50   2.4  Binary Division (Restoring Method or Long-hand Method)  55   2.5  9's and 10's Complement  57   2.6  1's Complement and 2's Complement  61  Direct Method of getting 2's complement  62  2's Complement Subtraction Method (Unsigned Binary)  62   2.7  Signed Integer Arithmetic (2's complement addition and subtraction)  65  2's Complement Addition (signed)  65  Overflow  66  2's Complement Subtraction (signed)  67  l Questions  70 Chapter 3 : Codes   3.1  BCD Codes  71  Weighted Codes  72  Non-weighted Codes  72  Reflective Codes  73  Sequential codes  73  BCD Addition  73   3.2  Gray Codes  75  Gray to Binary Conversion  76  Use of Gray Codes  77   3.3  Character Codes  77  ASCII Code  77  EBCDIC Code  78   3.4  Error Detection and Correction Codes (Hamming Code)  78  Error Detecting Codes  79  Parity Code  79  Check sum  80  Error Correcting Codes (Hamming code)  80   3.5  Excess-3 (XS3) Code  83  Property of XS3 Code  84   3.6  Packed and Unpacked BCD  85  Packed BCD  85  Unpacked BCD  85   3.7  Problems and Solutions  86  BCD Addition Problems  86  Binary to Gray Conversion Problems  91  Gray to Binary Conversion Problems  92  XS3 Code Problems  93  l Questions  95 Chapter 4 : Computer Fundamentals   4.1  Block Diagram of Computer  97  Input  98  Output  98  Memory  99  RAM : (Random Access Memory)  99  ROM (Read Only Memory)  99  CPU (Central Processing Unit)  100  ALU (Arithmetic Logical Unit)  100  CU (Control Unit)  101  Registers  101  General Purpose Registers  102  Non-Programmable Registers : (Temporary Register)  102  Index Register  102  Instruction Register  102  Accumulator  103  Program Counter (Instruction Pointer) : PC/IP)  103  Flag Register (Status Register)  103  Stack Pointer (SP)  103  System Bus  104  Address Bus  104  Data Bus  104  Control Bus  104   4.2  Working of a Computer (Steps of Instruction Execution)  105   4.3  Algorithm   107   4.4  Flowchart  108   4.5  Stored Program Concept (Von Neumann Computer)  110   4.6  Word length of a Computer  110   4.7  Processing speed of a computer  111   4.8  User Interface  112   4.9  Hardware, software and firmware   112   4.10  Microprocessor  114  ALU (Arithmetic Logic Unit)  115  Control Unit (CU)  115  Register Array  115  Examples of microprocessor  115  Use of microprocessor  116   4.11  Single chip microcomputer (Microcontroller)  116   4.12  Computer Generations  117  First Generation (1946-1954)  117  Second Generation (1954-1964)  118  Third Generation (1965-1974)  119  Fourth Generation (1975)  120  Fifth Generation (Future Generation)  120   4.13  Clock Frequency (MHz - GHz)  121  l Questions  122 Chapter 5 : Basic Logic Design   5.1  Logic gates  123   5.2  Basic Gates : AND, OR, NOT  124  AND Gate  124  AND Gate using Switches  125  AND Gate using Diodes  126  OR Gate  127  Truth Table for 2-input OR Gate  128  OR Gate using Switches  129  OR Gate using Diodes  129  NOT Gate (INVERTOR)  130  NOT Gate using a Switch  131  NOT Gate Using Transistor  131   5.3  Universal Gates  132  NAND Gate  132  NOR Gate  133   5.4  X-OR Gate (Exclusive OR Gate)  134  XOR Gate properties and use in computers  135   5.5  Exclusive NOR Gate (XNOR)   136  XNOR Gate Properties & use in computer  137   5.6  Implementation using NAND and NOR gates (Universal Gates)  138   5.7  Application of Gates  141   5.8  Positive and Negative Logic  141  l Questions  142 Chapter 6 : Boolean Algebra   6.1  Algebraic Simplification Boolean Expression  143   6.2  Logic Diagram  144   6.3  Basic Identities in Boolean Algebra  144   6.4  De-Morgan's Theorems  147   6.5  Simplification of Boolean Functions  148   6.6  Implementation Using Basic Gates  152   6.7  To Obtain Expression from the Logic Circuit  155   6.8  NAND-NAND and NOR-NOR Implementation   159   6.9  Representation of Boolean Expression  171   6.10  Fundamental Product and Fundamental Sum  172   6.11  Minterms and Maxterms  175   6.12  Finding an expression for the output  176   6.13  Finding the expression in POS form   180   6.14  Karnaugh Map  181  Two-Variable k-map  182  Three Variable K-map  183  Simplification of Boolean Expression using K-map  184  Groups  184  Pair  184  Quad  184  Octet  185  Single  185  Overlapping  185  Rolling  186  Pair  186  Solving with Zeros  187   6.15  Logic Circuit Design   188  Combinational Logic Circuit  188  Sequential Logic Circuit  188   6.16  To Obtain the Solution in POS Form  205  Implementation using Universal Gates  212  Implementation using Universal Gates  215  Exercises for you  231  l Questions  238 Chapter 7 : Combinational Logic Circuits   7.1  Half Adder  239  Truth Table of Half Adder  240  Logic Circuit of Half Adder   240   7.2  Full Adder  242  Definition  242  Block Diagram  242  Truth Table for Full Adder  243  Logic Circuit for Full Adder  243  Full Adder using Half Adders  244  Uses of Half Adders and full Adders  245   7.3  Binary Adder  245   7.4  1's Complement Generator Circuit  247   7.5  2's Complement Generator Circuit  249   7.6  Binary Adder/Subtractor  250   7.7  Incrementer  251   7.8  Decrementer  252   7.9  Half Subtractor  253  Definition   253  Block Diagram  253  Truth table  253   7.10  Full Subtractor  253  Definition  253  Block Diagram  253  Truth Table  254  Full Subtractor Using Half Subtractors  255   7.11  Multiplexer  256  Definition  256  Block Diagram  256  Block Diagram of 8:1 Multiplexer  258  Truth Table for 8:1 Multiplexer  258  Logic Circuit for 8:1 Multiplexer  258  Multiplexer with Enable (strobe) input  259  8:1 Multiplexer with strobe input  261   7.12  Word Multiplexers  263  4:1 word multiplexer for 2-bit words  264   7.13  Demultiplexer  266  Definition  266  Block Diagram  266  Logic Circuit for 1:4 Demultiplexer  267   7.14  Decoder  269  Definition  269  Block Diagram  269  3 to 8 Decoder  270  Truth table of 3 to 8 Decoder  271  BCD to Decimal Decoder  272  Logic circut for BCD to Decimal Decoder  273   7.15  Encoder  274  Definition  274  Block Diagram  274  Octal to Binary Encoder  274  The logic circuit of octal to Binary Encoder  275  Decimal to Binary (BCD) Encoder  276  Hexadecimal to Binary Encoder  277   7.16  Parity Checker  277   7.17  Parity Generator  278  Even Parity Generator  278  Odd Parity Generator  279   7.18  Applications of Parity Generators and Parity Checkers  in Communication: Error Detection  280   7.19  Magnitude Comparator  281  l Questions  284 Chapter 8 : Sequential Logic Circuits and Flip-Flops   8.1  Flip-Flops  287   8.2  RS Flip-Flop  289  RS Flip-Flop using Transistor  290  RS Flip Flop using NOR Gates (NOR Latch)  291  RS Flip Flop using NAND Gates (NAND Latch)  292  The Differentiator Circuit  293  The RC Differentiator Circuit  293  Response of RC Differentiator Circuit to Square Wave (Clock)  294  Level Clocked RS Flip flop  295  Negative level clocked RS flip flop  296  Positive Edge Triggered RS flip-flop  297  Truth table : Positive edge triggered RS-flip flop  298  Negative Edge Triggered RS Flip Flop  298  Logic Circuit  299  Demerits of R-S flip-flop  299   8.3  D-Flip-Flop  299  Unclocked D-Latch using NAND gate  300  Unclocked D-latch Using NOR Gates  300  Level Clocked D-flip-flop  301  Positive Edge Triggered D-flip-flop  301  Negative Edge Triggered D-flip flop  302  Advantages of D-flip flop  303   8.4  JK-Flip-Flop  303  Level Clocked JK Flip Flop  303  Race Around Problem  305  Ways to Remove Race Around Problem  305  Positive Edge Triggered JK-Flip flop  306  Negative Edge Triggered JK-Flip Flop  307   8.5  Master-Slave JK Flip-Flop  308  Level Clocked Master-Slave JK Flip flop  308  Edge Triggered Master-Slave JK-Flip-flop  309  Advantages of JK flip flop  310   8.6  T-Flip-Flop  310   8.7  Preset and Clear Inputs  311  l Questions  313 Chapter 9 : Registers   9.1  Buffer Register  315  Uncontrolled Buffer Register  315  Controlled Buffer Register  316   9.2  Shift Registers  317  Uncontrolled Left Shift Register  317  Controlled Left Shift Register  318  Right Shift Register  319  Uncontrolled Right Shift Register  320  Controlled Right Shift Register  321   9.3  Another Classification of Shift Registers  322  Serial-In Serial-Out Register  323  A One-Bit SISO Register  323  A 4-bit SISO Register  323  Serial-In Parallel-Out Register  324  Parallel-In Serial-Out Register  325  Parallel-In Parallel-Out Register  326   9.4  Tristate Buffer  326  Bidirectional Buffer (Transceiver)  328  l Questions  329 Chapter 10 : COUNTERS   10.1  Counters  331   10.2  Asynchronous Counter (Ripple Counter)  331  Timing Diagram  332  Mod-8 Asynchronous (Ripple) Up-counter  333  Logic Circuit  333  Timing Diagram  334  State Diagram  334  Mod-4 Asynchronous Down-Counter  334   10.3  Synchronous Counters  336  Timing Diagram  337  Mod-4 Synchronous Counter  337  Mode-8 Synchronous Up-Counter  337  State Diagram  337  Logic Circuit  338  Timing Diagram  338  Mod-4 Synchronous Down-Counter  339  State Diagram  339  Logic Circuit  339  Timing Diagram  340  A Mod-3 Asynchronous (Ripple) Up-counter  340  State Diagram  340  Timing Diagram (Mod-3 Asynchronous Counter)  340   10.4  Controlled Asynchronous Counter  343   10.5  Controlled Synchronous Counter  344   10.6  Presettable Counters  344  State Diagram  346  Timing Diagram  348   10.7  UP/Down Counter  349  A Mod-8 Up/Down Asynchronous Counter  350   10.8  Comparision of Synchronous and Asynchronous Counter  351   10.9  Ring Counter  351  Ring Counter Using Left Shift Register  352  Ring Counter Using Right Shift Register  353  l Questions  354 Chapter 11 : TTL and CMOS Circuits   11.1  Introduction to TTL Circuits  355   11.2  TTL Specifications  356  Propagation Delay  356  Power Dissipation  356  Fan-in  356  Fan-out  356  Noise Immunity  357  Noise Margin  357  Voltage Levels  357   11.3  Types of TTL  358  Standard TTL  358  Standard TTL NAND gate  359  Multiple Emitter Transistor  360  Inverter Transistor  360  Totem Pole Circuit  360  High Speed TTL  361  Low Power TTL  361  Schottky TTL  361  Low Power Schottky TTL  362   11.4  Characteristics of TTL  362  Floating Input  363  Worst case input voltage  363  Worst case output voltages  363  Compatibility  363  Noise Margin  364  Sourcing and Sinking current  364  Standard Loading  365  Loading Rules  365   11.5  Open Collector Gates  366  Advantages of open collector gate  366  Disadvantage of Open Collector Gate  366   11.6  Some 7400 Series IC Pin Layouts  367   11.7  CMOS  368   11.8  MOSFET as a switch  368  N-channel Enhancement MOSFET  369  P-channel Enhancement-type MOSFET  370   11.9  CMOS NOT Gate (Inverter)   371   11.10  CMOS NAND Gate  372   11.11  CMOS NOR Gate  373   11.12  CMOS Logic Devices  375  74C00 Series  375  54C00 Series  375  74HC00 Series  375  CD 4000 Series  375   11.13  Characteristics of CMOS Devices  375   11.14  Comparision of TTL and CMOS  377   11.15  Introduction to Some Popular TTL ICs  378  IC 7485, IC 74180,  IC 74150  381  IC 74151  382  IC 74154  382  IC 7445  382  IC 7446  383  IC 7447  384  IC 7448  384  IC 7449  384  l Questions  385 Chapter 12 : Memory   12.1  Memory  387  Primary Memory  387  Secondary Memory  388   12.2  Main Memory : RAM, ROM  388  Static RAM  389  Dynamic RAM  389  Difference Between Static &<

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